1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same. More specifically, the present invention relates to a semiconductor device with a ferroelectric capacitor and method of manufacturing the same.
2. Background Information
Related examples of a semiconductor device with a ferroelectric capacitor are described in Japanese Patent Publications JP-A-2003-100994 and JP-A-1995-50391, which are hereby incorporated by reference. The former document describes a semiconductor device. Japanese Patent Publication JP-A-2003-100994 also discloses a semiconductor device that has a transistor, a ferroelectric capacitor, and a first wiring layer (IM). The transistor is formed on a semiconductor substrate. The ferroelectric capacitor is formed on a transistor via a first insulating layer. The first wiring layer (1M) is formed on the ferrolectric capacitor via a second insulating layer. Furthermore, JP-A-2003-100994 discloses a moisture diffusion protective film composed of Si3N4 and SiON formed on the first wiring layer. The structure of this semiconductor device allows a moisture diffusion protective film on the first wiring layer to prevent moisture generated in the manufacturing process from intruding into the ferroelectric capacitor.
On the other hand, Japanese Patent Publication JP-A-1995-50391 describes a semiconductor device. This semiconductor device also has a transistor, a ferroelectric capacitor, and a first wiring layer (IM). The transistor is formed on a semiconductor substrate. The ferroelectric capacitor is formed on the transistor via a first insulating layer. The first wiring layer (1M) is formed on the ferroelectric capacitor via a second insulating layer. Furthermore, JP-A-1995-50391 also discloses a silicon oxide film to which phosphorus is added and a silicon oxide film to which phosphorus is not added (a moisture diffusion protective film) that are laminated in that order. The structure of this semiconductor device allows for stress of a ferroelectric capacitor to be reduced and the intrusion of impurities to be blocked by the silicon oxide film to which phosphorus is added. Furthermore, moisture resistance and water resistance are ensured by the silicon oxide film to which phosphorus is not added.
In the case of a semiconductor device described in JP-A-2003-100994, the moisture diffusion protective film is mainly formed by reactive sputtering. A high power sputter power is applied to a target in this sputtering. Charged particles generated in plasma by the high power sputter electrize charges in a moisture diffusion protective film. These charges are accumulated in a gate electrode of a transistor via the first wiring layer under the moisture diffusion protective layer. This structure and process generate voltage between the gate electrode and the semiconductor substrate. Thus, damage resulting from the charging, which decreases breakdown voltage of a gate-insulating layer can become a problem.
In addition, in the types semiconductor devices described in both of the patent documents, there is a high possibility that moisture is generated when forming the first wiring layer, especially in an ashing process in which resist is removed after metal etching. There is a possibility that moisture generated in the ashing process could intrude into the ferroelectric capacitor at this point, because a moisture diffusion protective film is formed after the first wiring layer is formed. Given this structure and process, moisture intrusion can adversely affect the properties of the ferroelectric capacitor.
In view of the above, it will be apparent to those skilled in the art from this disclosure that there exists a need for an improved semiconductor device and a method of manufacturing the same. This invention addresses this need in the art as well as other needs, which will become apparent to those skilled in the art from this disclosure.